FAQ
FAQAbout Products
- FAQ > Controllers > Programmable Controllers MELSEC > MELSEC iQ-F Series > CPU Module > Regarding the latch settings of data register
FAQ
- Inquiries
Regarding the latch settings of data register
When FX5 CPU module's power is set to OFF, data register（D100） is cleared.
Are there any settings required to latch this register?
Answer
It is necessary to set the latch range from the following GX Works3 parameters:
[Navigation Window] -> [CPU Parameters] -> [Device/Memory Settings] -> [Device/Label Memory Area Setting]
For FX5UJ CPU module, the latch range can be set in the following versions and later.
・ FX5UJ CPU module, firmware version Ver. 1.070 or later
・GX Works3 Ver. 1.105 K or later
- Product Name
- FX5U, FX5UC, FX5UJ, FX5S
- Product Category
- CPU Module, Engineering Software
- Series
- MELSEC iQ-F Series
